Only a handful of well-funded specialist companies like TSMC and Samsung have the expertise and sufficiently deep pockets to do it.

TSMC, for example, plans to invest $25-28bn this year to bolster capacity to produce silicon wafers 3 nanometers thick.


3 nm is the thickness of the wafer you fool.

18 thoughts on “Oh God”

  1. “3nm” is a marketing number, loosely related to the width of the gate of the transistors on the wafer. Silicon manufacturing is so proprietary now it’s only really useful in comparing processes that make the same type of chips (processors, RAM, flash, etc.) from the same manufacturer.

    An actual “3nm” transistor will be ~20nm across, depending on what you actually measure. On the other hand, the layers it’s made up of will be less than 3nm thick, and the substrate will be much thicker (500-1000um), otherwise the wafer would be impossible to handle, let alone split up into dies, test and package.

  2. I thought this bit was funny: “Taiwan may be a small island nation of 23m people, but it is a superpower in the £317bn global computer chip industry – a fact which affords it outsized geopolitical clout.”

    It hadn’t occurred to me that Taiwan has outsized geopolitical clout: how would I recognise that clout?

  3. “affords it outsized geopolitical clout”
    Clout so outsized that very few states in the world will even acknowledge Taiwan as a country.
    When mainland China invades, the West will say “So long, and thanks for all the chips”.

  4. TtC – I believe using visible light photolithography (approx 400 – 700nm) was discontinued a long time ago – now it needs excimer lasers and X-rays for 3nm details.

  5. 3nm is the design grid, not the actual size of the components on the wafers…

    And given the trouble they’ve had/have with 5 and 7…
    Let’s just say I build my PC’s with previous-generation hardware. It has wrinkles ironed out, is generally priced down/sensibly, and tends to live long enough to pass on to kiddo’s in the (extended) family who start to need one for School ( by which time it’s 3 gens “old” ).

    The mugs who pay premium to be road-testers are ..well… mugs.

  6. @Ed P
    Aye, and the ‘photo’-resist for those X-rays is a challenge, and the masks must be predistorted so that diffraction effects are cancelled – just like pre-emphasis in old-style tape recorders 🙂
    Oh, and the charge on a gate is now just hundreds of electrons, so quantum effects mess it up.
    And yet all these problems are solved. It’s very impressive indeed, truly a world-scale and world-class endeavour.

    I wonder if the Great Reset crowd realise what an enormous pyramid of technology – and hence highly skilled occupations – they are relying upon even to make a phone call, or heat their dinner.
    Funny thing is, the olden-time elite they wish to reintroduce, even the very top Roman Senators and Emperors lived in what we would condemn as slum standard conditions.

    And how easily a bit of Pooh Bear’s Chinese aggression will destroy it all, without a moment’s concern. I think any investment in fragile plant in Taiwan is unwise currently.

  7. Current photolithography is using Extreme Ultraviolet (EUV) with a 13.5nm wavelength. The transistors are no longer planar, the gate now wraps around the channel. Each foundry has it’s own variation of how they do it, so process size is not really comparable between companies. The process has about reached the limits of physics. Current research is headed in the direction of 3D stacking to circuit density going up.

  8. TtC: I’ve worried a bit about the pyramid we balance on for more than 20 years. It only needs a few stones at the bottom to be kicked out and life is going to get shitty really fast.

    MG: SSD chips now have 128 layers in some designs. I’ve seen SEM photos of CPU chips and they look very much like the views of LA in Blade Runner.

  9. Not worked in that area for well over a decade but 3D and plasma ion beam were the trends at the time, though PVD and CVD were the mainstays. Some of the processes involved to ‘print’ the pattern on the chip are truly hair raising in terms of the materials, temperatures, pressure and the precision required etc.
    Our fire safety plan included checking the wind direction before assembling at fire safety points as we didn’t want to be downwind of the site due to some of the chemicals

  10. BniC: Where I used to work I needed to build a toy database of street locations for testing before it got deployed in a real town. Since the site was large with quite a few roadways I decided to name them. The one at a particular corner I named ‘Arsine Avenue’ because of the chemistry going on there. Quite a few fume stacks sticking up…

    I read ‘Brilliant!’ recently about the Japanese guy who finally managed to make Gallium Nitride blue LEDs. The strong message was the key is the right process and then the extreme process control needed to get it to work with all the little tweaks to optimise it. And choosing the right material in the first place, avoiding those who chased down the Silicon Carbide rabbit hole.

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